Model3/tasks/TEST-SELF_HVP_X_CP-INTERLOCK
This routine tests the Charge Port Interlock Loop (CPIL) is working properly, ensuring the charge port HV connection at the HV battery is made.
Open a version to see its description, requirements, and input definitions. Hardware configuration and live vehicle checks also determine availability.
No user inputs are listed in this firmware.
No user inputs are listed in this firmware.
Forces the High Voltage Processor (HVP) High Voltage Interlock Loop (HVIL) current source to be on for the specified duration in seconds. When the routine completes, the HVIL current source is no longer being forced on. To end the routine early, perform a Gateway (GTW) reboot through scroll wheel reset."
PROC_HVP_X_FORCE-HVIL-ON
Diagnoses an issue between the High Voltage Processor (HVP) and Power Conversion System (PCS). Enables wiring interface by toggling the DCDC, CHG, and PCS enable lines between the HVP and PCS. If the PCS, HVP, and/or Battery Management System (BMS) are absent, all three lines will report a failure.
TEST-SELF_HVP_X_PCS-INTERFACE
This routine will test if the High Voltage Processor (HVP) is communicating over CAN. Note that if the High Voltage Battery Management System (HVBMS) is MIA, this routine may falsely fail since the HVBMS forwards all HVS components status' to the Gateway.
PING-TP_HVP
This routine performs a self test of the HVP charge port (CP) interface.
TEST-SELF_HVP_X_CP-INTERFACE