APS_w271 — Ddr Scheduler0 Ecc Errors
Full alert identifier: APS_w271_ddrScheduler0EccErrors
Alert description
The Double Data Rate Synchronous Dynamic Random-Access Memory Scheduler-0 (DDR SRAM) Error Correction Code (ECC) on the Autopilot electronic control unit (ECU) has encountered errors.
Potential impact
This information is not available in the alert reference.
Set condition
This information is not available in the alert reference.
Clear condition
This information is not available in the alert reference.
Signals to check
These diagnostic fields are associated with APS_w271. Check the alert's Alert Log in Service Mode Plus for available values.
| Signal | Unit |
|---|---|
Buffer Rd Correctable Err Threshold
APS_
|
— |
Buffer UE
APS_
|
— |
Csr Parity
APS_
|
— |
Ddr Rd Correctable Err Threshold
APS_
|
— |
Fifo Parity 0
APS_
|
— |
Fifo Parity 1
APS_
|
— |
Fifo Parity 3
APS_
|
— |
Fifo Parity 4
APS_
|
— |
Show 14 more fields
| Signal | Unit |
|---|---|
Fifo Parity 5
APS_
|
— |
Fifo Parity 6
APS_
|
— |
Fifo Parity 7
APS_
|
— |
Fifo Parity 8
APS_
|
— |
Parity Err From Memory
APS_
|
— |
Parity Err On Ecc
APS_
|
— |
Rd Correctable Err From Buffer
APS_
|
— |
Rd Correctable Err From Memory
APS_
|
— |
Rd Crc Err
APS_
|
— |
Rd Uncorrectable Err From Buffer
APS_
|
— |
Rd Uncorrectable Err From Memory
APS_
|
— |
Req Addr Parity Err
APS_
|
— |
Wr Correctable Err In Buffer To Dram
APS_
|
— |
Wr Uncorrectable Err In Buffer To Dram
APS_
|
— |
Check other alerts
With Service Mode Plus enabled, open Service Alerts → All. Review the other alerts for clues to the cause of APS_w271.